CFP: RustINDIA Conference 2026

Session Description
The integration of Rust into the Linux kernel marks the end of the “Rust experiment”. Memory safety without garbage collection is now an industry mandate for systems programming. However, applying Rust to modern, undocumented silicon remains a heavily guarded discipline. The Raspberry Pi 5 is a prime example: it abandons the legacy monolithic System-on-Chip design for a disaggregated topology. To build a modern interrupt-driven OS on this board, developers must bridge the BCM2712 CPU and the RP1 Southbridge over a PCIe Gen2 interconnect, configuring inbound translation windows and routing Message-Signaled Interrupts (MSI-X) across silicon boundaries.

This talk dissects the engineering of a simple custom bare-metal operating system to echo back characters from the ground up to solve this exact hardware problem. We will explore how Rust’s type system is uniquely equipped to model complex physical topologies. We will demonstrate using #[repr(C)] and volatile intrinsics to build a safe Peripheral Access Crate (PAC), utilizing Zero-Sized Types (ZSTs) to enforce hardware state transitions at compile time, and leveraging Rust’s Send/Sync traits alongside UnsafeCell to physically prevent data races and reentrancy bugs within a multi-stage, asynchronous interrupt pipeline (UART -> PCIe -> MIP -> GICv2).

Takeaways

1. Practical patterns for mapping and interacting with complex hardware topologies (PCIe ECAM, Root Complexes, Interrupt Controllers) in a #![no_std] environment using zero-cost abstractions.
2. A concrete understanding of how to leverage Rust’s ownership model, typestates, and concurrency primitives to mathematically prevent hardware state violations and interrupt-driven data races at compile time.

Target Audience
Systems engineers, firmware developers, C/C++ developers evaluating Rust for low-level infrastructure, and software engineers interested in the exact mechanics of how code executes on bare silicon.

Speaker Bio
Devansh Lodha is an undergraduate systems researcher at IIT Gandhinagar and an incoming Software Engineering Intern at Google. His research focuses on deterministic systems architecture and network diagnostics. In the open-source ecosystem, he engineered the disaggregated boot sequence and PCIe/MSI-X interrupt pipeline for the Raspberry Pi 5 port of the official rust-embedded/rust-raspberrypi-OS-tutorials (14.5k+ stars). Currently, he architects the Pi 5 Hardware Abstraction Layer for Flamingos, an experimental Rust kernel.

Working Draft of the Presentation

https://docs.google.com/presentation/d/1hhvqroqeltu5qjwnW8rcsGYeRNzOarbufJ1Ftp9RifI/edit?usp=sharing